Lab 4: Multiplyer

After creating an adder/subtracter, a multiplier is a good next step.

Once again, before we start talking about any circuit logic or design, we need to figure out the mechanics of the problem. Multiplication, like addition, isn’t very difficult. We all know the rules, but once again, binary adds a new perspective.

Note 1: Multiplication consists of 2 parts. First the multiplication, then addition. Because we will need to multiply numbers larger than 1, such as 8 (1000), we are forced to do the addition step.

Note 2: With binary, 1×1 still equals 1, so no need to carry bits in the multiplication step.

So, starting with regular multiplication let’s take a look:

As you can see, there are some digits highlighted. As said by note 2, we will not have to carry numbers in the multiplication step, only the addition step. Therefore, the multiplication is easy.


Which by definition matches an AND gate (ironic, no?). The tough part is figuring out how to handle all the additions. As I said in both the adder posts, the adder can be expanded infinitely to add TWO sets of bits together. When you start having to add multiple lines of bits, things get sticky.

The layout of our math (to keep the notation straight) is gonna look like this:

An and Bn are the bits being multiplied. Design does depend on how many digits are being combined.
Xn = Bn x A0
Yn = Bn x A1
Zn = Bn x A2
Vn = Bn x A3

Also, in all this mess is carry bits. We will tackle that in the design stage.

So, we have the basic framework to build our multiplier, but how to put the pieces together? Let’s look at the image again.
F0 = X0 Easy!
F1 = Y0 + X1 also easy. No carry!
F2 = Z0 + Y1 + X2 Okay, problematic…

How to solve this? Well, simple design can be just as useful as talking about it.

The image may be hard to see in this blog, so try a LINK.

As you can see, the adders are in a similar orientation to our multiplication tables at the top. The addition is sandwiched between the bits. If you look across the top of the design, the An bits are taken care of vertically, while the Bn bits are added in horizontally (to make the design less of a rat-trap). All the layers are added together like VZYX0 + VZYZ1 THEN + VZYZ2 and so on. The design is easy to expand or condense and is convenient.

So, to expand the design, here are the equations:
Full adders: B across by (A-1) down (number of bits)
AND gates: B x A
Fn (outputs) = A + B

The real trouble of the design is making sure that all wires are connected properly. One foul connection and the system will not work.


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