Lab 5/6: Usable Output (7-segment displays)

So after going through the previous labs, I understand that the content is a little much. The major problem is that the systems work in binary while we all know decimal. What would make this all much better is a “translator” so that we could read the outputs quickly and easily without being some computer wiz-kid.

For numbers we will use a 7-Segment display, as seen below:

These readers can be found in all sorts of gadgets. Microwaves, calculators, watches, billboards, etc. They are easy to read and we are all very familiar with them.

The Catch: We need a way to translate from binary to a form that turns on/off the proper segments.

There are two ways we can tackle the problem. Both with widely different solutions.

Use BCD:
By using 4 bits to convey each digit, we can solve the problem with logic gates. For instance: 8 = 1000. We change that into 1111111 or 0000000 (depending on the device) and we get a usable output.

-Can build with basic parts
-Can (if you had too much free time) count with other bases up to base 16

-Hard to expand
-Can display errors
-Extra outcomes

By using some Boolean tricks we can minimize/eliminate much of the errors. The final outcome looks something like [LINK].

The other possibility is a full translator. A custom piece of machinery that just spews out an answer for whatever input provided. This tool is called a ROM.

For a ROM, you program all possible outputs so that it just “answers” the input automatically, regardless of “logic”.

-Easily implemented
-Scalable (up to max size)

-Must be programed (time consuming)
-Has MAX scale. Larger arrays will require larger ROMs

This comes in handy with large systems. For instance, we can logically solve a system with up to 6 inputs. Any larger than that requires a 4th dimension or powerful computing equipment. So, for a system of 8 inputs (in this case) a programed ROM saves a lot of time.

For this case, the programed ROM will handle numbers from 0->255. This way, we can have a reusable part (much like the Full Adder from lab 3) that we can implement in further labs.

For instance, much like the previous image, we can have a 8-bit translator that is much simpler to implement.

NOTE Quartis “simplifies” the inputs/outputs into busses. Those thick lines are technically several inputs in one. Also, it compresses inputs/outputs into one symbol that you assign for all “addresses”.
Writer’s Note: I will post images later tonight. I do not have access to all the parts on this machine, but the tags have already been added. Check back soon!


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